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Fudia FSD700P series industrial grade mSATA SSD delivers all the advantages of Flash Disk technology with the Serial ATA I/II interface, fully compliant with standard mSATA form factor. SATA drives are replacing the older and slower (PATA) interface in embedded environments. Fudia FSD700P series mSATA SSD is based on the mSATA form factor which is generated by JEDEC, designed to operate at a maximum operating frequency of 150 MHz with 30 MHz external crystal. Its capacity could provide a wide range from 4 GB to 128 GB. Also it can reach up to 240 MB/s read as well as 190 MB/s write high power consumption of Flash Disk is much lower than traditional Hard Drive.performance based on MLC flash (with 64 MB DDR enabled and measured by CrystalDiskMark v3.0). The power consumption of Flash Disk is much lower than traditional Hard Drive. |
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| Specifications | |||
| Flash Type | SLC | MLC | Ultra MLC |
| 43 n.m. | 32 n.m. | 32 n.m. | |
| Capacity | Support 48 bits addressing mode | ||
| 1 GB ~ 64 GB | 4 GB ~ 128 GB * | 4 GB ~ 64 GB * | |
| Read/Write (Max.) Performance | Read: 240 MB/s | Read: 240 MB/s | Read: 240 MB/s |
| Write: 180 MB/s | Write: 220 MB/s | Write: 220 MB/s | |
| Electrical/Physical Interface | SATA 1.5 Gbps and 3.0 Gbps interface | ||
| DDR I I/I interface | |||
| Flash I/O | 1.8 V and 3.3 V voltage levels flash I/O | ||
| 1.8 V for ONFI Flash | |||
| 3.3 V for conventional Asynchronous Flash | |||
| Controller Features | SATA Revision 2.6 compliant. | ||
| Compatible with SATA 1.5 Gbps and 3 Gbps interface. | |||
| Power management supported. | |||
| Support expanded register for SATA protocol 48 bits addressing mode. | |||
| Embedded BIST function of SATA PHY for low cost mass production. | |||
| NAND Flash Interface | Build in hardware ECC circuit (up to 48 bit/2 KB). | ||
| Support all types of SLC and MLC Large Block 8 KB/page NAND flash. | |||
| ONFI2.0 Interface support: 4 channels max. | |||
| Contain up tp 4 PCs TSOP/ULGA Flash. | |||
| Bus Width | 8/16 bits. | ||
| Built-in | Built-in 32 bits micro controller | ||
| DDR I interface | 16 bit data bus. | ||
| Date rate: 300 Mbps | |||
| Capacity: 64 MB | |||
| Support | UART | ||
| GPIO | |||
| ECC scheme | Support 48/32/28 bits ECC correct per 2KB data | ||
| Operation Temperature | Normal temperature series → 0 ~ +70°C | ||
| Wide temperature series → -40 ~ +85°C | |||
| Storage Temperature | Normal temperature series → 0 ~ +70°C | ||
| Wide temperature series → -40 ~ +85°C | |||
| Humidity | RH = 95% under 55°C | ||
| Shock# | 1,500 G / 0.5 ms | ||
| Vibration# | 20 G (80 ~ 2,000 Hz) | ||
| Acoustic | 0 dB | ||
| Certificates Acquired | RoHS \ WHQL \ CE \ FCC | ||
| Remarks | |||
| *MLC and Ultra MLC products will be produced upon requested only. | |||
| # Subject to be changed without notice. | |||
